Two-symbol FPGA architecture for fast arithmetic encoding in JPEG 2000

Ramesh Kumar, Nandini and Xiang, Wei and Wang, Yafeng (2012) Two-symbol FPGA architecture for fast arithmetic encoding in JPEG 2000. Journal of Signal Processing Systems, 69 (2). pp. 213-224. ISSN 1939-8018

Abstract

JPEG 2000 is one of the most popular image compression standards offering significant performance advantages over previous image standards. High computational complexity of the JPEG 2000 algorithms makes it necessary to employ methods that overcomes the bottlenecks of the system and hence an efficient solution is imperative. One such crucial algorithms in JPEG 2000 is arithmetic coding and is completely based on bit level operations. In this paper, an efficient hardware implementation of arithmetic coding is proposed which uses efficient pipelining and parallel processing for intermediate blocks. The idea is to provide a two-symbol coding engine, which is efficient in terms of performance, memory and hardware. This architecture is
implemented in Verilog hardware definition language and synthesized using Altera field programmable gate array. The only memory unit used in this design is a FIFO (first in first out) of 256 bits to store the CXD pairs at the input, which is negligible compared to the existing arithmetic coding hardware designs. The simulation and synthesis results show that the operating frequency of the proposed architecture is greater than 100 MHz and it achieves a throughput of 212 Msymbols/sec, which is double the throughput of conventional one-symbol implementation and enables at least 50% throughput increase compared to the existing two-symbol architectures.


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Item Type: Article (Commonwealth Reporting Category C)
Refereed: Yes
Item Status: Live Archive
Additional Information: © Springer Science+Business Media, LLC 2012. Permanent restricted access to published version due to publisher copyright policy.
Faculty / Department / School: Historic - Faculty of Engineering and Surveying - Department of Electrical, Electronic and Computer Engineering
Date Deposited: 24 Jan 2013 07:17
Last Modified: 14 Oct 2014 06:58
Uncontrolled Keywords: JPEG 2000; arithmetic coding; MQ-coder; FPGA; two-symbol architecture
Fields of Research : 08 Information and Computing Sciences > 0803 Computer Software > 080302 Computer System Architecture
09 Engineering > 0906 Electrical and Electronic Engineering > 090601 Circuits and Systems
08 Information and Computing Sciences > 0804 Data Format > 080403 Data Structures
Socio-Economic Objective: E Expanding Knowledge > 97 Expanding Knowledge > 970108 Expanding Knowledge in the Information and Computing Sciences
Identification Number or DOI: 10.1007/s11265-011-0655-1
URI: http://eprints.usq.edu.au/id/eprint/21565

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